Neural Networks Accelerator and Applications
Neural networks (NNs) have been successfully implemented in modern artificial intelligence (AI) applications ranging from image processing to speech recognition to natural language processing. While NNs deliver superior accuracy, they still suffer from the high cost of computational complexity and a significant amount of data movement.
For example, convolutional neural networks (CNNs) are the most representative class of NNs, which have been widely applied to image classification. The convolution layers of CNNs will dominate the runtime since convolution layers occupy over 90% of the total operations. Although these operations could be executed in parallel, the overall system cannot reach potential performance improvement due to the insufficient on-chip memory to store the intermediate processing results. In this case, the energy consumption will still remain high, since data movement will cost more than computation.
Therefore, energy-efficient accelerators for NNs are needed for power-constrained devices (i.e. phones, drones, robots, and self-driving cars). This kind of accelerators should make neural networks feasible to current-generation IoT devices with high accuracy and ultra-low power consumption.
We are working on minimizing the computational complexity of NNs by reducing redundant operations and weights. We are also designing energy-efficient accelerators (e.g. ASIC, FPGA) specifically for NNs without violating prediction accuracy. Moreover, we are exploring efficient memory allocation methods based on our designs, which will help to reduce the data movement cost. Further, we are going to explore silicon photonic based neural network circuits.